Verification of Logic Gates & Demorgan's Theorems using TTL logic Gates |
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| Verification of Logic Gates & Demorgan's Theorems using TTL logic Gates
(PSAW -F60A) |
| 3 input AND gate, NAND gate, NOR gate, 2 input EX_OR gate, single input NOT gates.
Instrument comprises of DC Regulated Power Supply Gages, IC's placed inside the cabinet & connections brought at sockets. 4 SPDT swtiches provided for selecting logic '1' & gates, NOR gate, NAND gate & Demorgan's Theorems can be connected with the combination of OR, AND & NOT gates and varified.
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